Sandisk Corp. v. Memorex Products, Inc. (Formerly Doing Business as Memtec Products, Inc.) , 415 F.3d 1278 ( 2005 )


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  •   United States Court of Appeals for the Federal Circuit
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    SANDISK CORPORATION,
    Plaintiff-Appellant,
    v.
    MEMOREX PRODUCTS, INC. (formerly doing business as Memtec Products, Inc.),
    Defendant-Appellee,
    and
    PRETEC ELECTRONICS CORPORATION,
    Defendant-Appellee,
    and
    POWER QUOTIENT INTERNATIONAL CO., LTD.,
    Defendant,
    and
    RITEK CORPORATION,
    Defendant-Appellee.
    Donald R. Dunner, Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P., of
    Washington, DC, argued for plaintiff-appellant. With him on the brief were Thomas H.
    Jenkins, of Washington, DC, and Erik R. Puknys, of Palo Alto, California. Of counsel on
    the brief were Michael A. Ladra and James C. Yoon, Wilson Sonsini Goodrich & Rosati
    P.C., of Palo Alto, California; and Michael A. Berta and Ariana M. Chung-Han, of San
    Francisco, California.
    Jon B. Streeter, Keker & Van Nest, LLP, of San Francisco, California, for defendant-
    appellee Memorex Products, Inc. (formerly doing business as Memtec Products, Inc.). Of
    counsel was G. Whitney Leigh.
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    Ronald C. Finley, Mount & Stoelker, P.C., of San Jose, California, argued for
    defendant-appellee Pretec Electronics Corporation. With him on the brief were Daniel S.
    Mount, Alfredo A. Bismonte, and Justin T. Beck.
    Alan D. Smith, Fish & Richardson P.C., of Boston, Massachusetts, argued for
    defendant-appellee Ritek Corporation. With him on the brief was Charles H. Sanders.
    Appealed from: United States District Court for the Northern District of California
    Chief Judge Vaughn R. Walker
    United States Court of Appeals for the Federal Circuit
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    SANDISK CORPORATION,
    Plaintiff-Appellant,
    v.
    MEMOREX PRODUCTS, INC. (formerly doing business as Memtec Products, Inc.),
    Defendant-Appellee,
    and
    PRETEC ELECTRONICS CORPORATION,
    Defendant-Appellee,
    and
    POWER QUOTIENT INTERNATIONAL CO., LTD.,
    Defendant,
    and
    RITEK CORPORATION,
    Defendant-Appellee.
    _______________________
    DECIDED: July 8, 2005
    _______________________
    Before RADER, GAJARSA, and DYK, Circuit Judges.
    GAJARSA, Circuit Judge.
    SanDisk appeals the district court’s judgment of no infringement in favor of
    Memorex, Pretec, and Ritek. The district court granted summary judgment that various
    Flash memory devices made by these defendants did not infringe independent claims 1
    or 10 – or various claims depending therefrom – in SanDisk’s 
    U.S. Patent No. 5,602,987
    to Flash EEprom systems.        The trial court ruled that the claims at bar did not
    contemplate or allow for a Flash memory system in which some EEprom memory cells
    are grouped into sectors that are not partitioned into user and overhead data portions.
    As the record showed that the defendants’ products contained sectors of memory cells
    lacking such partitions, the trial court determined that these defendants could not
    infringe. We conclude that the trial court misread the claims at issue, and erred in
    finding a prosecution disclaimer in support of its reading.     We further reject the
    contention that judicial estoppel forecloses SanDisk’s claim construction arguments on
    appeal. Thus, we vacate the judgment and remand for further proceedings.
    I.
    A.
    SanDisk Corp. (“SanDisk”) owns 
    U.S. Patent No. 5,602,987
     to Flash EEprom
    systems (“the ’987 patent”).1    The ’987 patent issued on February 11, 1997, and
    describes methods for using EEproms as non-volatile solid state computer memory. A
    non-volatile memory retains its contents even after power is shut off.      This “flash
    memory” has many applications, including the memory used in digital cameras, PDAs,
    memory sticks or MP3 players.
    1
    Electrically erasable programmable read only memory (EEprom).
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    Flash EEproms can sustain only a limited number of writes and erases before
    they fail. The ’987 system and methods include innovations directed at improving flash
    memory performance and extending EEprom life. The patent focuses, in particular, on
    improving the memory system architecture over the prior art. The memory architecture
    generally concerns how the memory system solves the problem of storing or retrieving
    specific information from the memory cells. See ’987 patent, col. 5, ll. 4-21. If the
    architecture can be designed to minimize the number of times each EEprom memory
    cell is erased and rewritten, then that solution can extend the useful life of the integrated
    circuit. If the architecture allows for faster operations, then the EEprom performance
    will improve.
    The ’987 patent addresses these issues in at least two ways relevant to this
    appeal. First, it introduces a multi-sector erase function. In earlier systems either every
    memory cell in an EEprom would be written or erased in one operation, or only a single
    “sector” could be erased in one operation. See ’987 patent, col. 4, ll. 46-63. Where not
    all the information was to be erased, systems that operated only on the entire chip had
    to read that information out, store it in a temporary location (typically a different, volatile
    memory or RAM), erase the entire chip, and then write the information back into the
    EEprom memory. 
    Id.
     The other approach, operating sequentially on individual sectors,
    proved time-consuming.
    The ’987 patent describes a different way of organizing the memory storage, and
    in particular arranges memory cells into “sectors” akin to the physical “sectors” used for
    storage on magnetic disk drives. The ’987 patent allows the operator to select multiple
    sectors for simultaneous erase. The defining feature of the “sector” of memory cells is
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    that all cells within the sector are erased together. See ’987 patent, col. 1, ll. 65-66
    (“[A]n array of Flash EEprom cells on a chip is organized into sectors such that all cells
    within each sector are erasable at once.”); 
    id.
     at col. 5, ll. 9-11 (“The memory in each
    Flash EEprom chip is partitioned into sectors where all memory cells within a sector are
    erasable together.”). Put differently, the “sector” is the “basic unit of erase.” The ’987
    patent illustrates this architecture, as implemented on a single EEprom or integrated
    circuit (chip), in Fig. 3A:
    Although the block diagram in Fig. 3A illustrates the description of multiple
    sectors on a single chip, the multi-sector erase feature is not limited to individual
    EEproms. As the ’987 patent notes, “the selected sectors [for erase] may be confined
    to one EEprom chip or be distributed among several chips in a system. The sectors
    that were selected will all be erased together.” ’987 patent, col. 5, ll. 16-19. Because
    this allows more intelligent use of the memory, avoiding needless erases, it improves
    performance and extends the operational life of the EEproms. As the patent explains,
    “[t]his is faster and more efficient than prior art schemes where all the sectors must be
    erased every time or only one sector at a time can be erased. The invention further
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    allows any combination of sectors selected for erase to be deselected and prevented
    from further erasing during the erase operation.” ’987 patent, col. 2, ll. 4-7.
    Second, the architecture described in the ’987 patent further requires
    “partitioning” the “sectors” into at least two components – one for “user data,” and a
    second for “overhead.” “User data” means the information that the processor stores or
    on which it operates. “Overhead data” refers to administrative information used by the
    memory controller, such as data address information (typically the information included
    in a header), memory cell defect maps, error correction code, and so on. The memory
    allocation in a “typical” sector is illustrated in Fig. 5:
    SanDisk argues that this feature “improves the reliability of Flash EEprom memory
    systems.” The written description explains,
    The memory architecture has a typical sector 401 organized into a data
    portion 403 and a spare (or shadow) portion 405. The data portion 403 is
    memory space available to the user. The spare portion 405 is further
    organized into an alternative defects data area 407, a defect map area
    409, a header area 411 and an ECC and others area 413. These areas
    contain information that could be used by the controller to handle the
    defects and other overhead information such as headers and ECC.
    ’987 patent, col. 8, ll. 43-50.
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    B.
    In 1998 SanDisk accused Lexar Media Inc. (“Lexar”) of infringing claims 1 and 10
    of the ’987 patent. The action was assigned to Judge Breyer in the Northern District of
    California.     On March 4, 1999, Judge Breyer issued a claim construction order
    interpreting the “user data and overhead data portions.” He expressly limited the order
    to “those terms and issue[s] discussed by both parties in their memoranda and at the
    claim construction hearing.” SanDisk Corp. v. Lexar Media, Inc., No. C 98-01115 CRB,
    
    1999 WL 129512
    , at *2 (N.D. Cal. Mar. 4, 1999).
    With that caveat, Judge Breyer ruled that the partitioning and user data / over
    head data limitations meant that
    Each non-volatile memory sector must have at least one user data portion
    and one overhead data portion, but is not limited to only one data user
    portion and only one overhead data portion.
    
    Id. at *3
    . SanDisk eventually obtained a judgment of infringement against Lexar.
    C.
    In October 2001, SanDisk sued four Flash memory system manufacturers:
    Memorex Products, Inc. (“Memorex”); Pretec Electronics Corp. (“Pretec”); Ritek Corp.
    (“Ritek”); and Power Quotient International Co., Ltd., for infringing the ’987 patent,
    claims 1 and 10 (and various dependent claims). In due course Power Quotient was
    dismissed from suit.
    SanDisk sought a preliminary injunction based on Judge Breyer’s claim
    construction.    The defendants opposed, and the trial court denied the motion.       In
    assessing the partitioning limitation, the trial court heavily relied on the prosecution
    history:
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    SanDisk specifically limited its claim to include only those devices in which
    each sector within a memory cell array contains both overhead and user
    data. SanDisk cannot now argue that only some of the sectors of a
    memory cell array need to contain user data and overhead data.
    On September 30, 2003, the district court construed claims 1 and 10 to require
    that every cell in the memory device be grouped into a sector, and every sector be
    partitioned into user and overhead data portions.       See SanDisk Corp. v. Memorex
    Prods., Inc., No. C-01-4063 VRW, slip. op. at 34 (N.D. Cal. Apr. 20, 2004) (“Pretec SJ
    Order”) (“[T]he court’s claim construction requires all sectors within the memory array to
    be partitioned.”).
    Although the trial court’s claim construction considered the claim language and
    the written description, the court relied primarily on a finding of prosecution disclaimer.
    
    Id. at 28
     (“[T]he court finds that SanDisk clearly and unmistakably disclaimed coverage
    of systems in which only some of the sectors in the array were partitioned into at least
    user data and overhead portions.”); see also 
    id. at 16-29
    .
    With that claim construction the trial court granted Ritek summary judgment of
    non-infringement, because Ritek had presented evidence that their products include
    some sectors that are not partitioned.
    Pretec and Memorex moved for summary judgment on the same ground. The
    court granted Pretec’s motion on April 20, 2004, and Memorex’s motion on May 13,
    2004, after each party supplemented the record with evidence about their devices.
    The trial court entered judgment of no infringement. SanDisk timely appealed.
    Ritek and Pretec separately oppose.       Memorex joins in Pretec’s opposition. Pretec
    adopts Ritek’s arguments in opposition by reference, but did not file a separate joinder.
    The court has jurisdiction under 
    28 U.S.C. § 1295
    (a)(1) (2000).
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    II.
    The court reviews de novo the trial court’s summary judgment of no infringement.
    Hilgraeve Corp. v. McAfee Assocs., Inc., 
    224 F.3d 1349
    , 1352 (Fed. Cir. 2000).
    Summary judgment is proper only if the movants are entitled to judgment as a matter of
    law, and no genuine issue of material fact requires a determination by a fact-finder. See
    Fed. R. Civ. P. 56(c); Anderson v. Liberty Lobby, Inc., 
    477 U.S. 242
    , 250 (1986). In this
    case there are no disputed material facts at issue. The judgment turns solely on claim
    construction, which the court reviews de novo. See Cybor Corp. v. FAS Techs., Inc.,
    
    138 F.3d 1448
    , 1456 (Fed. Cir. 1998) (en banc).
    A.
    The court’s claim construction ascribes claim terms the meaning they would be
    given by persons of ordinary skill in the relevant art at the time of the invention. See 
    35 U.S.C. § 112
    ; Innova/Pure Water, Inc. v. Safari Water Filtration Sys., Inc., 
    381 F.3d 1111
    , 1116 (Fed. Cir. 2004).       Claim construction begins with the language of the
    asserted claims. See Vitronics Corp. v. Conceptronic, Inc., 
    90 F.3d 1576
    , 1582 (Fed.
    Cir. 1996). The relevant claim language in this case appears identically in independent
    claims 1 and 10. It provides,
    A method of operating a computer system including a processor and a
    memory system, wherein the memory system includes an array of non-
    volatile floating gate memory cells partitioned into a plurality of sectors that
    individually include a distinct group of said array of memory cells that are
    erasable together as a unit, comprising:
    providing said memory array and a memory controller within a card that is
    removably connectable to the computer system, said controller being
    connectable to said processor for controlling operation of the array when
    the card is connected to the computer system,
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    partitioning the memory cells within the individual sectors into at least a
    user data portion and an overhead portion . . . .
    ’987 patent, col. 16, ll. 24-37 (claim 1, emphases added); see also 
    id.
     at col. 17, ll. 30-44
    (claim 10). Although SanDisk also asserted claims 2, 5, 6, 12, and 15 of the ’987
    patent, each depends from claim 1 or 10 and incorporates the forgoing limitations in
    relevant part. The parties do not dispute, and the trial court correctly noted, that the
    preamble recited above is limiting.2
    Reviewing the partitioning requirement, the trial court concluded that claim 1 and
    claim 10 require every Flash EEprom memory cell within an actual device to be grouped
    into a sector that is partitioned into user and overhead data portions. SanDisk argues
    that this construction misreads the plain language of the claim. The argument proceeds
    on two levels. First, by its plain language, claims 1 and 10 require only that the claimed
    memory system contain some memory cells, grouped into sectors, partitioned into user
    and overhead data portions. Nothing in the claims precludes additional memory cell
    configurations, which need not contain such partitioned sectors. Second, claims 1 and
    10 are self-evidently drawn to claimed methods. It is fully consistent with practicing the
    claimed invention to make additional, unclaimed use of Flash EEprom memory cells, so
    long as each limitation is satisfied. We agree.
    The invention is claimed using non-restrictive terminology. The memory system
    “includes” an array of “non-volatile floating gate memory cells” which are “partitioned
    2
    That is, because “when read in the context of the entire claim” the
    preamble “recites limitations of the claim . . . or . . . is ‘necessary to give life, meaning,
    and vitality’ to” claims 1 and 10, the trial court properly treated the language as limiting.
    Pitney Bowes, Inc. v. Hewlett-Packard Co., 
    182 F.3d 1298
    , 1305 (Fed. Cir. 1999).
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    into a plurality of sectors.” The claimed method requires “partitioning the memory cells
    within the individual sectors into at least a user data portion and an overhead portion.”
    As a patent law term of art, “includes” means “comprising.” See Amgen Inc. v. Hoechst
    Marion Roussel, Inc., 
    314 F.3d 1313
    , 1344-45 (Fed. Cir. 2003); Hewlett-Packard Co. v.
    Repeat-O-Type Stencil Mfg. Corp., Inc., 
    123 F.3d 1445
    , 1451 (Fed. Cir. 1997). Neither
    includes, nor comprising, forecloses additional elements that need not satisfy the stated
    claim limitations.   Nor does the choice of articles—“an array” of memory cells, “a
    plurality of sectors,” “said array of memory cells,” “the memory cells,” or “the individual
    sectors”—compel a different conclusion. These groupings of Flash EEprom memory
    cells provide an antecedent basis for various steps of the claimed method, but nothing
    in their recitation excludes other configurations of memory cells on a physical device
    that, in some part, practices the claimed methods. Thus, nothing in the language of
    claims 1 or 10 prevents the use of Flash EEproms containing cells that are not grouped
    into partitioned sectors.
    B.
    SanDisk further argues that the ’987 patent specification is inconsistent with the
    trial court’s claim construction because, among other reasons, it excludes at least two
    preferred embodiments: one involving storing a sector defect map in Flash EEprom
    memory cells, and another involving using Flash EEprom cells as a write memory
    cache. As explained below, the court need only consider the sector defect map to
    conclude that SanDisk is correct.
    The court must always read the claims in view of the full specification. See
    Vitronics, 
    90 F.3d at 1582
    . A claim construction that excludes a preferred embodiment,
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    moreover, “is rarely, if ever, correct.” Vitronics, 
    90 F.3d at 1583
    ; see also C.R. Bard,
    Inc. v. U.S. Surgical Corp., 
    388 F.3d 858
    , 865 (Fed. Cir. 2004).          The ’987 patent
    specification describes an embodiment involving a sector defect map, which, in brief,
    contains information mapping defective memory sectors into good ones.           See ’987
    patent, col. 11, ll. 57-60. Although the defect map may be stored in spare, defect-free
    portions of the affected sector, at some point there will be too many defects to keep the
    defect map in that location. “Thus, it is preferable in another embodiment to locate the
    sector map in another memory maintained by the controller.            The memory may be
    located in the controller hardware or be part of the Flash EEprom memory.”           ’987
    patent, col. 11, l. 65 – col. 12, l. 1 (emphasis added). SanDisk argues that because the
    sector defect map would contain only overhead data, the portions of the Flash EEprom
    memory used in the preferred embodiment would not be partitioned into user data and
    overhead data portions as required by according claims 1 or 10. As the district court’s
    claim construction would foreclose that possibility, the claim construction must be
    wrong.
    The trial court rejected this argument. It ruled, instead,
    The fact that the sector defect map contains only overhead data does not
    prove that the embodiment contemplates sectors with only overhead data.
    Although the sector defect map is composed entirely of overhead data, the
    court finds that the sector defect map is located entirely within the
    overhead portion of a single sector.
    We find this reasoning misplaced.
    In its brief to this court Ritek concedes that the sector defect map could be
    located in “a part of memory outside the array of sectors partitioned into a user data and
    overhead portions, i.e., in an unsectored part of the memory.” Ritek Br. at 43-44. If
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    Ritek is correct, then the trial court’s claim construction must be wrong. The claims
    must allow, instead, for Flash EEprom memory cells that are not sectored, or not
    partitioned, according to the claimed methods.        But since Ritek concedes this point,
    and both Pretec and Memorex join Ritek’s argument, there is no dispute left for the
    court to resolve.     In sum, the trial court’s speculative treatment of the preferred
    embodiment is unsupported by the patent specification, not grounded in the record, and
    contrary to the reading suggested by all parties. We conclude that SanDisk is correct in
    faulting the trial court’s claim construction.
    Ritek contends that the only sectors described in the ’987 patent specification are
    partitioned as illustrated in Fig. 5. Thus, Ritek concludes, the invention is directed only
    to partitioned sectors. We find this reasoning misplaced for at least two reasons. First,
    as noted above the language of claims 1 and 10 does not preclude other, unclaimed
    organizations of Flash EEprom memory cells. Thus, even if the court concluded that
    Fig. 5 shows the only partitioning consistent with the claimed methods that would not
    preclude use of other organizations in the memory system. Second, it is axiomatic that
    without more the court will not limit claim terms to a preferred embodiment described in
    the specification. Laitram Corp. v. Cambridge Wire Cloth Co., 
    863 F.2d 855
    , 865 (Fed.
    Cir. 1988) (“References to a preferred embodiment, such as those often present in a
    specification, are not claim limitations.”). The ’987 patent specification plainly describes
    the sector partitioning illustrated at Fig. 5 as a “typical” sector organization. See ’987
    patent, col. 8, ll. 43-45. It is a preferred embodiment of the sector organization claimed
    in the claim 1 and 10 methods.           In short, Ritek’s argument is misplaced.      The
    specification does not contradict the plain meaning of claims 1 and 10.
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    C.
    The prosecution history does not compel a contrary result.         The court must
    always consult the prosecution history, when offered in evidence, to determine if the
    inventor surrendered disputed claim coverage. See Medrad, Inc. v. MRI Devices Corp.,
    
    401 F.3d 1313
    , 1319 (Fed. Cir. 2005) (“We cannot look at the ordinary meaning of the
    term ... in a vacuum. Rather, we must look at the ordinary meaning in the context of the
    written description and the prosecution history.”).
    After consulting the prosecution history, the trial court ruled that SanDisk
    disclaimed any method or device in which Flash EEprom memory cells were not
    grouped into partitioned sectors. Ritek urges the court to affirm this analysis. SanDisk,
    however, maintains that the trial court erred in this conclusion.       Instead, SanDisk
    argues, nothing in the prosecution history provides a clear and unmistakable disclaimer
    as found by the district court. On reviewing the relevant arguments to the examiner, we
    agree with SanDisk.
    1.
    When the patentee makes clear and unmistakable prosecution arguments
    limiting the meaning of a claim term in order to overcome a rejection, the courts limit the
    relevant claim term to exclude the disclaimed matter. See Omega Eng’g, Inc. v. Raytek
    Corp., 
    334 F.3d 1314
    , 1324 (Fed. Cir. 2003) (“[W]here the patentee has unequivocally
    disavowed a certain meaning to obtain his patent, the doctrine of prosecution disclaimer
    attaches and narrows the ordinary meaning of the claim congruent with the scope of the
    surrender.”); Standard Oil Co. v. Am. Cyanamid Co., 
    774 F.2d 448
    , 452 (Fed. Cir. 1985)
    (“[T]he prosecution history (or file wrapper) limits the interpretation of claims so as to
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    exclude any interpretation that may have been disclaimed or disavowed during
    prosecution in order to obtain claim allowance.”).
    As this court has explained,
    The doctrine of prosecution disclaimer [precludes] . . . patentees
    from recapturing through claim interpretation specific meanings disclaimed
    during prosecution. See Schriber-Schroth Co. v. Cleveland Trust Co., 
    311 U.S. 211
    , 220-21 (1940) (“It is a rule of patent construction consistently
    observed that a claim in a patent as allowed must be read and interpreted
    with reference to claims that have been cancelled or rejected, and the
    claims allowed cannot by construction be read to cover what was thus
    eliminated from the patent.”); Crawford v. Heysinger, 
    123 U.S. 589
    , 602-
    04 (1887); Goodyear Dental Vulcanite Co. v. Davis, 
    102 U.S. 222
    , 227
    (1880); cf. Graham v. John Deere Co., 
    383 U.S. 1
    , 33 (1966) (ruling, in
    addressing the invalidity of the patents in suit, that “claims that have been
    narrowed in order to obtain the issuance of a patent by distinguishing the
    prior art cannot be sustained to cover that which was previously by
    limitation eliminated from the patent”).
    ....
    As a basic principle of claim interpretation, prosecution disclaimer
    promotes the public notice function of the intrinsic evidence and protects
    the public's reliance on definitive statements made during prosecution.
    See Digital Biometrics, Inc. v. Identix, Inc., 
    149 F.3d 1335
    , 1347 (Fed. Cir.
    1998).
    Omega, 
    334 F.3d at 1323-24
    .
    An ambiguous disclaimer, however, does not advance the patent’s notice
    function or justify public reliance, and the court will not use it to limit a claim term’s
    ordinary meaning.     See 
    id. at 1324
     (collecting cases).       There is no “clear and
    unmistakable” disclaimer if a prosecution argument is subject to more than one
    reasonable interpretation, one of which is consistent with a proffered meaning of the
    disputed term. See Golight, Inc. v. Wal-Mart Stores, Inc., 
    355 F.3d 1327
    , 1332 (Fed.
    Cir. 2004) (finding no disclaimer because “the statements in the prosecution history are
    subject to multiple reasonable interpretations, they do not constitute a clear and
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    unmistakable departure from the ordinary meaning of the term [at issue]”); Cordis Corp.
    v. Medtronic AVE, Inc., 
    339 F.3d 1352
    , 1359 (Fed. Cir. 2003) (concluding that a
    statement made during prosecution “is amenable to multiple reasonable interpretations
    and it therefore does not constitute a clear and unmistakable surrender”). The question,
    therefore, is whether any of SanDisk’s prosecution arguments to the examiner have no
    reasonable interpretation other than to disavow any memory system in which Flash
    EEprom memory cells are not grouped into partitioned sectors.
    2.
    In this case the relevant prosecution argument responded to an obviousness
    rejection.   The ’987 patent issued from application Ser. No. 174,768 (“the ’768
    application”). On December 7, 1995, the examiner rejected original claims 79 (which
    issued as claim 1) and 85 (which issued as claim 10) in the ’768 application as obvious
    under Burke in view of Yorimoto. The examiner explained that Burke – an Australian
    patent, No. AU-B-22536/83 – taught a memory system including “an array of cells which
    are inherently partitioned into a plurality of sectors because Burke’s array is to ‘emulate’
    a magnetic disk which has sectors.” As the examiner explained, Yorimoto – European
    patent application No. 86114972.2, Pub. No. 0 220 718 – “teaches partitioning the cells
    with a sector into portions, each portion is for storing a specific type of information.”
    Rejecting claim 85 (issued claim 10), the examiner concluded,
    It would have been obvious to one having ordinary skill in the art at
    the time the invention was made to use Yorimoto’s memory (of EEPROM
    type) and Yorimoto’s memory cells partitioning in place of Burke’s
    memory.
    The artisan would have been motivated to use Yorimoto’s
    EEPROM in the place of Burke’s memory because Yorimoto’s EEPROM
    can be partitioned into sectors and Burke’s emulation inherently suggests
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    that the emulating memory should be able to emulate the sectors of
    Burke’s magnetic disk.
    SanDisk argued that the examiner was mistaken.               In particular, SanDisk
    explained:
    The memory cell array is divided into sectors, with the cells within each
    sector being erasable together as a unit. Stored in each sector is a
    sectors [sic] worth of user data and some overhead information (a header)
    about the sector and/or about the user data stored in the sector.
    (quoted at Pretec SJ Order, slip. op. at 25). Relying heavily on SanDisk’s description of
    “each sector”, the trial court concluded that SanDisk was referring to every sector on the
    ’987 patent EEproms. Id. at 26. Ritek contends that the trial court’s analysis was
    correct, and with this language SanDisk disclaimed its current claim construction. We
    disagree, and find no clear and unmistakable disclaimer in this passage.
    The trial court’s and Ritek’s reasoning assumes its conclusion.         The quoted
    passage begins with the proviso that “The claims are directed to a flash EEPROM
    system[.]”   If, when viewed in context, SanDisk used this passage to describe the
    memory cell array – and, in particular, the claimed sector organization subject to the
    methods in original claims 79 and 85 – then there is no prior reason why that memory
    cell array or the discussion of it should be presumed to exhaust every cell on every
    EEprom in the “memory system” recited in the claim preambles.            Given the open
    language in the claims, there is no reason for the court to read the prosecution
    argument with such a presumption in mind.          Put differently, the reference to “each
    sector” means “each sector” subject to the claimed method, and no more. In short,
    SanDisk’s reading of this prosecution argument is at least reasonable. Thus, focusing
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    on this passage alone, there is no “clear and unmistakable surrender” within the
    meaning of Golight.
    The trial court further reasoned that because SanDisk sought to emulate a disk
    drive with the claimed memory system, it followed that SanDisk intended to group every
    Flash EEprom memory cell into a partitioned sector. The trial court focused on the
    following prosecution argument, responding to the obviousness rejection of original
    claim 79:
    The claims in this application each define more than the desire to make a
    semiconductor memory system look on the host system side of the
    memory controller to be a disk drive. They define a way of configuring
    and using a semiconductor memory on the memory side of the controller
    in a way similar to a disk drive. Claim 79 defines a flash EEPROM system
    with an array that is divided into sectors of cells that are erasable together
    as a unit. This is not new by itself but is a particular type of memory . . . to
    be used to emulate a disk drive. None of the . . . cited references suggest
    use of such a type of memory. The only mention of an EEPROM system
    is by Yorimoto et al. but their embodiments appear to be generically
    described for use with either an EEPROM or a battery backed volatile
    RAM. Nothing is said by Yorimoto et al. of a flash EEPROM system that
    is operated with sectors of cells that are erasable together as a unit. It is
    the use of this type of memory that allows the memory itself to be
    operated very similarly to that of a disk drive, with individual sectors that
    store both user data and overhead data (a header for the sector). It is the
    operation of the flash EEPROM memory by the memory controller with the
    sectored and partitioned characteristics of a disk drive memory that is
    novel and non-obvious.
    Ritek contends that the trial court correctly read this passage to disclaim the claim
    construction set forth above. Again, we disagree.
    First, as with the last passage, this argument is directed to explicating the
    claimed invention.    It does not purport to exclude from the “memory system” other
    configurations of Flash EEprom memory cells.         Even though SanDisk identifies the
    novel invention as “operation of the flash EEPROM memory by the memory controller
    04-1422, -1610
    - 17 -
    with the sectored and partitioned characteristics of a disk drive memory,” that statement
    goes to the claimed memory organization.
    Second, the fact that with the claimed invention SanDisk sought to emulate a
    disk drive memory storage configuration does not compel the conclusion that SanDisk
    required every Flash EEprom memory cell in the “memory system” recited in the claims
    to be grouped into partitioned sectors. The trial court’s reasoning, in short, relies on a
    false analogy. Though every memory cell on a disk drive might have a physical location
    in a partitioned sector, it does not follow that to “emulate” that function every memory
    cell in a Flash EEprom array must also be so grouped.               To the contrary, the
    organization of memory cells in the Flash EEprom is physically limited only by the
    requirement of a simultaneous erase by sector; in other respects, the cells are grouped
    into sectors by a logical allocation. Thus, while physical organization of memory on a
    disk drive might require every memory cell to be placed in a partitioned sector, the
    physical organization of memory cells on an EEprom does not.
    The prosecution history as a whole confirms this point. In an earlier passage,
    SanDisk argued:
    The claimed memory system looks to the host computer as if it was a
    disk drive system, similar to the goal stated in the cited Burke patent. But
    a significant difference is the claimed operation of the flash EEPROM
    array with many incidents of a disk system. It is divided into sectors that
    are operated as a unit, including overhead data (a header) as well as
    user data, and, in some of the claims, the overhead data is read from an
    addressed sector before user data is written into that sector.
    (emphases added). The passage focuses on the claimed operation of the flash EEprom
    memory cell array, the subject of claims 1 and 10; it does not address itself to
    unclaimed uses of the memory cells. Moreover, according to SanDisk, that particular
    04-1422, -1610
    - 18 -
    EEprom configuration was not obvious from combining Burke, which emulated a disk
    drive, and Yorimoto, which claimed an EEprom array:
    This is quite different from the way that semiconductor memory
    arrays are usually operated. . . . The present claims . . . define a disk like
    approach to semiconductor memory operation. The fact that the system
    of the Burke patent may look to the host system as a disk memory
    system does not mean that its array is operated in sectors, with headers,
    etc., as claimed. . . .
    . . . [T]he flash EEPROM system employed in the present invention,
    unlike typical RAMs, do have memory operations that can benefit from
    auxiliary information.     The provision for making such information
    available in a header of each sector in the context of a solid state
    memory is part of the present invention.
    An underlying assumption made throughout the Examiner’s Action
    is that it is inherent in the system of the cited Burke reference to operate
    its volatile RAM array with sectors, and thus obvious to include overhead
    data (headers) in individual sectors. This premise, and thus all the
    rejections based upon it, is respectfully submitted to be incorrect.
    Contrary to the position taken in the Examiner’s Action, it is submitted
    that the fact that Burke’s system looks to the host system as a disk drive
    memory does not compel this conclusion. The alleged inherent Burke
    disclosure upon which nearly all the grounds of rejection are based does
    not exist.
    In other words, it was novel to organize the cells into partitioned sectors for purposes of
    the claim, but the claimed purpose of emulating a disk drive did not compel sorting
    every memory cell – even those not subject to the claimed method – in that fashion.
    In sum, we conclude that SanDisk did not unmistakably surrender the grouping of
    Flash EEprom memory cells into non-partitioned sectors. The prosecution history is
    consistent with the plain meaning of claims 1 and 10, and does not compel the trial
    court’s contrary reading.
    04-1422, -1610
    - 19 -
    D.
    Ritek argues that equity requires judicially estopping SanDisk from arguing the
    claim construction discussed above because SanDisk argued, in earlier litigation and on
    preliminary injunction in this action, that claims 1 and 10 required every memory cell in
    the Flash EEprom memory to be grouped into partitioned sectors.3 Thus, according to
    Ritek, “SanDisk should be estopped from playing fast and loose with the courts by
    changing the meaning of its patent claims simply because its interests have changed
    now that it knows how Ritek’s products work.”          Ritek Br. at 25-26.      We find this
    argument misplaced.
    Judicial estoppel is an equitable doctrine that prevents a litigant from “perverting”
    the judicial process by, after urging and prevailing on a particular position in one
    litigation, urging a contrary position in a subsequent proceeding – or at a later phase of
    the same proceeding – against one who relied on the earlier position. See Hamilton v.
    State Farm Fire & Cas. Co., 
    270 F.3d 778
    , 782 (9th Cir. 2001); Data Gen. Corp. v.
    Johnson, 
    78 F.3d 1556
    , 1565 (Fed. Cir. 1996). It is within the trial court’s discretion to
    invoke judicial estoppel and preclude an argument. 
    Id.
     Here, the trial court did not
    apply the doctrine and the appellees ask this court, in its appellate jurisdiction, to find an
    estoppel.
    As the Supreme Court recently explained,
    Where a party assumes a certain position in a legal proceeding, and
    succeeds in maintaining that position, he may not thereafter, simply
    because his interests have changed, assume a contrary position,
    especially if it be to the prejudice of the party who has acquiesced in the
    position formerly taken by him.
    3
    Pretec adopted Ritek’s arguments by reference. Memorex filed a joinder
    in Pretec’s brief. Each appellee thus relies on Ritek’s judicial estoppel argument.
    04-1422, -1610
    - 20 -
    New Hampshire v. Maine, 
    532 U.S. 742
    , 749 (2001) (cit. omitted); see also 
    id. at 749-50
    (collecting cases). In New Hampshire, the Supreme Court identified several factors
    guiding the decision to apply judicial estoppel: (1) the party’s later position must be
    “clearly inconsistent” with the earlier position; (2) the party must have succeeded in
    persuading a court to adopt the earlier position in the earlier proceeding; and (3) the
    courts consider “whether the party seeking to assert an inconsistent position would
    derive an unfair advantage or impose an unfair detriment on the opposing party if not
    estopped.”     
    Id. at 751
    .   These factors, while not exclusive, must guide the court’s
    application of its equitable powers. 
    Id.
    Ritek’s judicial estoppel argument loses force when tested against these criteria.
    First, in the Lexar litigation, SanDisk never advanced a claim construction that was
    “clearly inconsistent” with the partitioning analysis discussed above. The trial court in
    Lexar therefore cannot be said to have adopted such a position at SanDisk’s urging.
    The district court here recognized that very point in its summary judgment and claim
    construction order. As it noted, “SanDisk’s argument [for the analysis set forth above]
    draws some strength from the limited nature of the Lexar court’s construction. The
    Lexar court did not explicitly construe the broader phrase from the patent [citing
    partitioning step].    The Lexar court limited its construction to the ‘user data and
    overhead data portions’ of claims 1 and 10.” As SanDisk observes, the issue before
    Judge Breyer in Lexar was whether the sectors subject to the claim 1 and claim 10
    methods were limited to a single user and data portion, or whether those sectors could
    be further partitioned. In short, Lexar involved a different dispute concerning the claim
    terms.
    04-1422, -1610
    - 21 -
    Second, SanDisk’s arguments at preliminary injunction in this action were no
    more “clearly inconsistent” than the arguments in Lexar.       In support of preliminary
    injunction, SanDisk argued that the preamble to claims 1 and 10 required “partitioning
    the array of non-volatile memory sector cells into at least a user data region and an
    overhead data region.”    SanDisk further argued, invoking the Lexar construction of
    “partitioned”, that the claim required “each non-volatile memory sector must have at
    least one user data portion and one overhead data portion, but is not limited to only one
    data user portion and only one overhead data portion.”
    As explained above, these arguments are directed to the claimed method, and
    the claims do not preclude additional memory cells that are not organized according to
    that method. Moreover, at preliminary injunction SanDisk plainly urged the Lexar claim
    construction, and that analysis did not extend to the issue at bar. Thus, there was no
    inconsistency between the arguments at preliminary injunction, and the disputed
    construction now on appeal.      In sum, the factual premise of Ritek’s argument is
    misplaced. There is no basis for judicial estoppel here.
    Moreover, the equities do not favor applying judicial estoppel to prevent claim
    construction arguments from evolving after preliminary injunction. The law provides, for
    example, that the trial court is free to revisit an initial claim construction adopted for
    preliminary injunction, recognizing that a preliminary construction made without full
    development of the record or issues should be open to revision. See Gillette Co. v.
    Energizer Holdings, Inc., 
    405 F.3d 1367
    , 1375 (Fed. Cir. 2005). After discovery the
    court expects the parties to refine the disputed issues and learn more about the claim
    terms and technology, at which point a more accurate claim construction can be
    04-1422, -1610
    - 22 -
    attempted. That is precisely what happened here. If, as it appears, SanDisk initially
    thought every memory cell on the accused Ritek products came within the claimed
    method, then there was no occasion to consider whether other, non-sectored or non-
    partitioned sectors of memory cells could be used in conjunction with claims 1 or 10.
    Thus, the present dispute only became an issue after further discovery.             Applying
    judicial estoppel here would subvert the useful function of pre-trial discovery and motion
    practice in focusing issues for trial. In sum, judicial estoppel does not prevent SanDisk
    from maintaining its current claim construction arguments.
    E.
    The parties further dispute the meaning of “array” as used in claims 1 and 10.
    The trial court determined that “array” meant a collection of Flash EEprom memory cells
    on one or more EEprom chips. SanDisk argues, to the contrary, that by the plain
    meaning expressed in technical dictionaries “array” refers only to a collection of cells on
    a single integrated circuit or chip. Ritek argues that the ’987 patent uses array in a
    specific sense, at odds with the plain meaning, but consistent with the trial court’s
    interpretation. Ritek further argues that judicial estoppel applies, with special force, to
    the proper reading of “array”.
    As noted above, the difference does not alter the trial court’s judgment of no
    infringement. The judgment does not depend on the choice between these disputed
    meanings of “array”. It turns, instead, on the district court’s reading of the partitioning
    requirements in the claims. Because this court reviews judgments rather than claim
    construction orders, we find it unnecessary at this point to decide this dispute.
    04-1422, -1610
    - 23 -
    III.
    Pretec urges the court to affirm the judgment of no infringement in view of its
    arguments concerning the meaning of “corresponds” in claims 1 and 10. Pretec made
    the same claim construction and infringement arguments to the trial court after the
    relevant cut-off dates under the Northern District’s Patent Local Rules and the trial
    court’s scheduling order.     The district court refused to entertain Pretec’s untimely
    arguments. As explained in Genentech, Inc. v. Amgen, Inc., 
    289 F.3d 761
    , 774 (Fed.
    Cir. 2002), this court gives broad deference to the trial court’s application of local
    procedural rules in view of the trial court’s need to control the parties and flow of
    litigation before it.   “[T]his court defers to the district court when interpreting and
    enforcing local rules so as not to frustrate local attempts to manage patent cases
    according to prescribed guidelines.” 
    Id.
     The district court’s application of the local rules
    are within its sound discretion, and when reviewing that exercise of discretion “this court
    determines whether (1) the decision was clearly unreasonable, arbitrary, or fanciful; (2)
    the decision was based on an erroneous conclusion of law; (3) the court's findings were
    clearly erroneous; or (4) the record contains no evidence upon which the court rationally
    could have based its decision.” 
    Id.
     None of these criteria for setting aside the district
    court’s ruling are satisfied here. In sum, Pretec shows no abuse of discretion in the
    district court’s ruling, and indeed we discern none.4
    IV.
    The district court erred in its claim construction. The limiting preambles in claims
    1 and 10 are written in open language, and the claims are not limited to memory
    4
    We do not decide whether, at trial on the merits, Pretec can or should be
    precluded from presenting these claim construction and non-infringement arguments.
    04-1422, -1610
    - 24 -
    systems in which every memory cell is grouped into a partitioned sector. The judgment
    of no infringement rests on an erroneous claim construction, and the court vacates it.
    The case is remanded for further proceedings.
    VACATED AND REMANDED
    Each side shall bear its own costs.
    04-1422, -1610
    - 25 -
    

Document Info

Docket Number: 2004-1422

Citation Numbers: 415 F.3d 1278

Judges: Dyk, Gajarsa, Rader

Filed Date: 7/8/2005

Precedential Status: Precedential

Modified Date: 8/3/2023

Authorities (23)

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